The Hardware Design And Implementation Of RAID Coprocessing Card Based On FPGA

With the developing of information technology, storage subsystem is becoming more and more important, so the RAID (Redundant Array of Independent Disks) system comes out and feeds these needs. Though a RAID improves the performance of the storage system by fetching the disks at the same time, the operating system booting,Cache and Redundancy Compute are also the bottleneck of the system performance. In order to overcome this status and improve the performance of the RAID system, the RAID Coprocessor Card based on FPGA is studied in detail.For RAID which is composed of general PC components, a RAID Coprocessor Card is designed based on 32bit PCI bus. It can solve the communication problem between the RAID server and RAID Coprocessor Card through the high speed PCI bus.The RAID parity function is implemented by FPAG technology so the redundant information generating process could be independent from the CPU. The RAID Cache is implemented with Non-Volatile storage device, NVRAM (Non-Volatile RAM) combined with FPGA, and can speedup the response time of RAID. The operating system was stored in a Flash embedded in the PCI interface device, and booting the RAID operating system is implemented in the FPGA.With the development of the Integrated Circuit, the frequency of the signal is higher and higher, the high speed signal integrity is more and more definitely. So we finish the board design with the high speed PCB (Printed Circuit Board) design rule and the hardware debug for the 33MHz and 66MHz PCI bus.Through the result of debug, it's proved that this Coprocessor Card can perform high throughput of parity processing, implement RAID Cache and RAID booting. It will help to make an improvement on the performance of RAID system.