The Reliability Analysis And Structure Parameter Opimization Of Stacked Die Package

With the increasing of multi-function and mini-sized packaging demand, the 3D packaging is becoming a development direction for packaging technology. As stacked chip scale packaging (SCSP) has many good properties, such as higher packaging density, smaller signal delaying and better interconnection, it is one important technique of realizing 3D packaging. At present, the technology of the stacked CSP has become quite mature at abroad, and the 8-dies stacked package has been developed. But in domestic, most of them were mainly concerned about single chip package, and the reliability of the stacked die package was hardly discussed. In this paper, packaging process for a typical stacked three-chip packaging has been simulated to analyse invalidation mechanism by ANSYS finite element analysis (FEA) method. Thermal fatigue character of the solder ball has been studied, and combining FEA results, the stacked package has been optimized. Therefore, it has an important theoretic significance and practical future to study the reliability of stacked die package.Firstly, this paper has designed three 3-dimension curing finite element models to simulate and analyze three major curing processes undergoing high temperature change. The results show that during the each curing process maximum stress occurs in the joints of die the bottom layer, and this may result in die crack and delamination in the bottom layer. By comparing the influence of the curing process on the reliability of the stacked package, it is found that die stress is largest after cureII, and the die is subjected to the highest risk of crack failure and delamination issue is mostly occurred.Based on the unified viscoplastic constitutive Anand equation, nonlinear finite element modeling is used to analyze stress-strain response of 63Sn37Pb solder joint under thermal cycle conditions. The simulation shows that high stress-strain focus in the corner of the inter solder, and crack may begin to grow along the high-stress area.Based on the above stress-strain analysis of the SnPb solder, thermal cycle life was evaluated by the energy. Under the thermal cycle conditions (-40℃～ 125℃), the thermal cycle life of the SnPb solder is about 685 cycles. When solder volumes are same, the thermal cycle life of the SnPb solder increase with the R/r decreasing and solder distance increasing.In this paper, finite element method is applied to analyse the influence of the SCSP device design parameter on the stress of the package. The simulation results show that the reliability of the free-lead SnAg solder adulterated some metals such as Cu, Bi or In etc, is nearly identical to that of the SnPb solder, so free-lead solder can replace the SnPb solder. The stress on dies is negatively proportional to the thickness of die. The thickness change in the bottom layer die is the main factor of the effect on the package reliability. With die-layer number increasing, stress on the dies increase, but the stress in the bottom layer die approximates to constant while using more than four layers in a stacked structure.