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Thermal Analysis And Solder Joint Reliability Analysis Of Three-dimensional Stacked Csp / Bga Package

Posted on:2007-02-07Degree:MasterType:Thesis
Country:ChinaCandidate:L LiFull Text:PDF
GTID:2208360185456444Subject:Mechanical Manufacturing and Automation
Abstract/Summary:PDF Full Text Request
As an advanced package, 3-D stacked CSP assembly provides significant size and performance advantages than traditional single chip package. Meanwhile, high packaging density tends to generate more power in a package and cause serious thermal problem. Temperature fluctuations caused by either power transients or environmental changes, along with the resulting thermal expansion mismatch between the various package materials, results in time and temperature dependent creep deformation of solder. In addition, vibration and shock are also the main reasons which can induce packaging fail. Many researches have been done to investigate the failure mechanisms for CSP assembly. But most of them were mainly concerned about single chip package. In this thesis, thermal and vibration reliability for stacked-die CSP assembly were discussed.Finite element method (FEM) was used to simulate thermal and vibration problems in stacked-die CSP assembly. Finite element models and APDL programes were built in ANSYS to conduct thermal, thermal-mechanical and vibration analysis. The aim of these researches were trying to find some possible reasons and trends which affect the reliability of stacked CSP/BGA assembly and give some useful suggestions for the packaging design.The main studies are as follows:1. Steady state thermal analysis under natural convection boundary condition was performed. Both the temperature distribution and the induced mechanical stress were calculated in this simulation. High stress area was found and the potential reasons which can cause packaging to fail were also discussed. Some element results of the model were extraced to determine the values of power dissipation on different surface. Thermal resistances theta JC, Psi JB and Psi JT were also calculated.2. Tow different types of power loading condition were applied on chips respectively. The transient thermal analysis was conducted to determine temperatures vary over time. 3. The Anand model, a unified viscoplastic constitutive relation, was applied to represent the nonlinear deformation behavior of 63Sn37Pb solder. Three-dimensional...
Keywords/Search Tags:stacked-die chip scale package, finite element method, reliability of solder joints, thermal analysis, vibration
PDF Full Text Request
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