Verification Of The Channel Codec Module In TD-SCDMA Baseband SoC

Channel Codec module, which serves as a hardware accelerator, is one of the critical modules in a TD-SCDMA baseband SoC. This module mainly implements such functions specified in 3GPP TS 25.222 as CRC attachment and detachment, convolutional encoding and viterbi decoding, turbo encoding and decoding, and first interleaving/deinterleaving. This module is connected by AHB to the DSP core in the chip. It needs sufficient verification before taped out to ensure the functional correctness and to reduce the possibility of failure.Verification, with gate counts and system complexity growing exponentially in a SoC, becomes the most perplexing challenge in product design. It usually consumes 60 to 80 percent time of the development term. It is especially tough to verify the mobile phone baseband chip, which has even more than 10 million gate counts. Therefore a large amount of engineers and EDA resources are dedicated in the costly verification. It is necessary to apply some efficient verification method to shorten the time to market, and also to guarantee the functional coverage.This paper introduces the dominant verification methods currently used in IC industry, and described the verification method based on EDA simulation, which had been applied in the TD-SCDMA/GSM dual mode baseband SoC design in Spreadtrum Co., Ltd. This paper details the chip's verification environment, including environment's implement framework, diretory architecture and bus functional model. Bus functional model can promote the abstract level to transaction level and using this can improve the verification efficiency and reusability. The environment supports simulation using both verilog HDL and SystemC.This paper elaborates all parts in the TCC module verification, such as test cases designed for TCC, reference model in matlab, testbench in SystemC and simulation management script in perl. This paper also summarizes the functional coverage and the code coverage given by EDA tools. The verification method and environment depicted in this paper prove powerful, efficient and resuable in practice of the channel codec module verification process.