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Research On JPEG2000 Codec's Algorithm And Optimization

Posted on:2008-12-06Degree:MasterType:Thesis
Country:ChinaCandidate:Q Z ZhengFull Text:PDF
GTID:2178360215994686Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
JPEG2000 is the lasted generation of international still image compression standard. With excellent image compression performance and superior image quality, it not only addresses a number of weaknesses in the exiting JEPG standard, such as block effect, but also provides several features like image progressive transmission by pixel accuracy and resolution, scalable image quality, lossless/loss compression, region of interest coding, etc. Due to the excellent coding performance and attractive features, JPEG2000 has a large rang of applications such as digital camera, medical imaging, digital library, network transferring and so on. However, it needs high performance processing ability to implement JPEG2000 codec for its complexity algorithms (wavelet transform, bit-plane coding and arithmetic coding). As a result, a certain extent, the advanced technologies limit the JPEG2000 applications.By analyzing the basic principle of JPEG2000, this paper implemented and optimized the modules with high complexity in JPEG2000, such as wavelet transform module and fractional bit-plane coding module. DWT (Discrete Wavelet Transform) with integer transform and fractional transform, was the foundation of JPEG2000 image progressive transmission, however, DWT based on one image tile, needed a large portion of memory. Fractional bit plane coding encoded the wavelet coefficients bit plane by bit plane to generated context and decision with high computational complexity and memory consumption. Therefore, in this paper, JPEG2000 codec was implemented and optimized based on DSP platform, included program optimization, memory allocation optimization and algorithm optimization.JPEG2000 attained high compression ratio via rate control algorithm based on rate-distortion rule. This rate control algorithm kept the best image quality at the same rate level. However, the algorithm should make the overall image code words to start-up the rate control operation, discarding the insignificant code word to meet the requirement of target rate. This algorithm was not a real-time rate control operation leading to low coding efficiency for JPEG2000 encoder. Thereby, a rate control algorithm based on linear prediction was proposed, to improve the performance of the encoder.In respect that EBCOT (Embedded Block Coding with Optimized Truncation) took up the most part of JPEG2000 system process time and became the bottleneck of JPEG2000 system, it was inapproachable to achieved high performance of JPEG2000 system only by software or DSP to implement EBCOT module. However, hardware way implementation for EBCOT module could improve the performance of JPEG2000 system greatly. In this paper, an architecture based on sample parallel coding within a column for EBCOT was adopted, with hardware speed-up way design, to upgrade EBCOT coding performance. This architecture encoded the four samples parallel within a column, skipped the unnecessary columns to save the encoding clock cycles.
Keywords/Search Tags:JPEG2000, DSP, Rate control, EBCOT, Hardware speed-up
PDF Full Text Request
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