Font Size: a A A
Keyword [State Metric]
Result: 1 - 5 | Page: 1 of 1
1. The Design And Implementation Of Viterbi-Decoder Coprocessor(VCP) In YHFT-DSP
2. The Research Of Improvement&Hardware Implementation Of MAP-The High Speed Turbo Decoding Algorithm
3. The Design And Implementation Of A Multiple Modes Viterbi Decoder
4. The Application Of MDPs’ Metric In Reinforcement Transfer Learning
5. Design And FPGA Implementation Of Memory Reduced Turbo Code Decoder Architecture Based On The Reverse Recalculation And Linear Estimation
  <<First  <Prev  Next>  Last>>  Jump to