| Because of the cost, system power consumption and time to market etc, many communication message, video frequency and image systems have not been realized simply by common DSP processors, but especially the FPGA (Field Programmable Gate Array) is fit for the repetitiveness' DSP operation of the multiplying and accumulating etc. And since the advantage in the performance, cost, flexibility and power consumption, the signal processors based on FPGAs have been applied to various signal processing fields. The FPGAs provide extremely strong flexibility and allow the designer to develop the products which could satisfy the various standards. The FPGAs' inherent flexibility and function also may let a designer keep abreast of the new standard's change, and can provide the feasible methods to settle for the ceaseless change standard request.It is well known, the adder and multiplier are the basic components of all DSP systems. At first this paper introduced the usual structure of the adder and multiplier, analyzing and comparing themselves' advantages and disadvantages. Then using the Altera Corporation's Quartus II4.0 software to compare their performance in terms of resource utilization and speed, discussing how to improve the speed of adder and the multiplier in FPGAs' design. In addition, this paper introduces the optimization methods about the direct-form and transposed-form FIR filters based on FPGAs. Some instance examples demonstrates that these measures can improve notably the performance of constant coefficient FIR filter.At last, this paper emphasizes a discussion about the application of Distributed Arithmetic (DA) in the linear FIR filter and brings forward some improvement measures according to their faults. For the sake of the verification of DA function, this paper designed and implemented the FIR filter based on the parallel DA and carried on the FPGA simulation. The simulation result shows that the actual value doesn't greatly differ from the computing value. |
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