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Research And Design Of FPGA Test System

Posted on:2012-04-23Degree:MasterType:Thesis
Country:ChinaCandidate:Q Z WangFull Text:PDF
GTID:2178330332987567Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
With the widely use of Field Programmable Gate Array (FPGA) devices, the research on FPGA testing is becoming more and more important. Manufacture testing of FPGA needs to ensure that the chip could work reliably in any programmable logic design, so we need to design more test configurations and test vectors to ensure the test coverage. In order to satisfy the FPGA manufacture testing efficiency and automation request, this article proposes an improved FPGA test system based on Automatic Test Equipment (ATE). The limited storage space of ATE make it difficult to expand the test system, so we use FLASH storage arrays to increase the storage space and compress corresponding cost of expanding the test system.The proposed system uses Xilinx USB cable to download the test configuration and implements the storage of multiple configuration files by controlling the location of test configuration in FLASH arrays through RS-232C interface. In the testing process, the system controls the test configuration reading and the device configuration through ATE. At first, this paper analyzes the system requirements and presents the workflow and overall realization architecture of the system. Then, this paper presents the hardware design of the testing board and configuration board, which is controlled by XC2S200. Finally, this paper details the implementation of the control logic and proposes the construction of software environment running on the host computer.The actual test result shows that configuration frequency of the Virtex FPGA could reach 95Mbit/s stably, which satisfies the requirement of the test efficiency. Download speed of test configuration is 160Kbit/s, which saves the test preparation time greatly. Compared with the traditional test system based on ATE, the proposed strategy improves the test efficiency and compresses the test cost at the same time.
Keywords/Search Tags:FPGA, FPGA testing, Configuration, JTAG, ATE
PDF Full Text Request
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