Research Of Turbo Product Code Iterative Decoding In Broadband Wireless Systems

Wireless Broadband communication is developing with higher rate, wider ranging and mobility. WiMAX technology satisfies the need of wireless Internet. Channel coding is one of the key technologies in wireless communication systems, because well channel coding can efficiently improve the system performance. technologies has been fashionable in the field of wireless communication research. So the research of channel code adopted in wireless communication transmission has of important theoretical and realistic significance.The concept of the Turbo codes were introduced in 1993 by Berrou ,Over the past years, there has been an enormous amount of research effort dedicated to the analysis of iterative decoding algorithms and the construction of iteratively decodable codes or "turbo-like codes" that approach the Shannon limit. And in 1994,near-optimum turbo-like decoding of product codes was introduced by Pyndiah . Turbo product codes (TPCs) are efficient error correcting codes that attains caplcity-approaching codes by means of an iterative turbo decoding process. The TPCs offers a wide range of flexibility in terms of performance, complexity, and code rate.The performance of turbo product codes are more efficient than CTC (Convolutionan Turbo Codes)for high code rate applications(R>0.7). TPC are very efficient for systems where spectral efficiency is the crucial parameter. TPC has perfect performance at low SNR and be able to counteract all kinds of interference and fading, so TPC is quite possibly used in wireless communication system with worse channel conditions.The primary works were done as following:1)Based modified Chase-Pyndiah SISO decoding algorithm, we evaluated the performance of different turbo product codes based on extended hamming codes when using BPSK modulation on a Gaussian channel. The BER simulations curves are obtained for different SNRs .The simulation results show that TPC offer a higher performance and a high degree of forward error correction capability. TPC is especially useful for future wireless commucations systems that require high-data-rate, low latency, low error flaring, high code rates and high-spectral efficiency, low-cost systems.2) Based on application given in IEEE802.16 standards ,the shortened TPC' s performance here are simulated, the simulation results show that the degradation of performance is 0.3 dB at a BER of 10^-5 ,so we draw some benefit conclusion.3) We give the tradeoff options in a turbo decoder design and these tradeoffs affect the implementation. we also analyse the complexity of this iterative decoding algorithm from a circuit design point of view.4)Basing on the analyzing of the theory and structure of the Turbo product code, we focuses on how to design and realize Turbo product codes iterative decoder basing on the FPGA in this paper. We presents two design architectures and analyz and compare them .In fact, prototype two is prototype one simplified. In the system designing, the whole system was divided according to the function module and realized respectively in terms of the character of the FPGA. With the system parameters set reasonably and the parameters' transmission between the modules, the whole Turbo code and decode system became more flexible. During the course of designing circuit, I used the software Xilinx ISE8.1 project navigator and ModelsimXE 6.0a simulation software, It operates very well at up to 50Mbps and contains about 55% of the FPGA resource. The simulations show that the system has good performance and practical value.Main characteristics of the paper ware presented as following:A decoder testbench verification is developed to test the BER performance of the TPC decoder in an AWGN channel .we also present a method of measuring the bit error rate (BER) performance of the TPC decoder using a test-bench. The output of the TPC decoder is then compared to the input and an error counter counts the number of mismatches. Using this approach we are able to obtain FPGA circuit has been verified by VHDL functional simulation which has been compared with initial simulations (C programs),two simulations result is very match. Therefore it prove that the whole design is logical, which is an useful attempt for the accomplishment more practical TPC decoder in the future.