The Research Of Programmable Structure Of Antifuse FPGA

With the rapid development of technology of IC design and manufacture, Field Programmable Gate Array (FPGA) had been applied widely in many fields. Antifuse FPGA had been applied widely too, by its advantage of passive, non-volatile, high integrity, high utilaze rate, high performance, security. At present, antifuse FPGA are completely dependent on import, there is no report of design and manufacture inland. The research of this aspect, will promote the development of our IC design.Antifuse devices comprise a pair of conductive electrodes separated by at least one layer of antifuse material and may include one or more diffusion barrier layers. Prior to programming antifuses exhibit very high resistance between the two electrodes and may be considered to be open circuits. While programming, direct-current programming potential is applied across the conductive electrodes for a period of time sufficient to disrupt the antifuse material and create at least one conductive filament therethrough. Then, the programming process disrupts the antifuse material and creates a low-impedance connection between the two conductive lectrodes.Antifuses are generally classifiable in two categories. A first type of antifuse has a doped region in a semiconductor substrate as its lower electrode and a layer of metal or doped polysilicon as its upper electrode. The antifuse material comprises one or more layers of silicon nitride or silicon dioxide. This type of antifuse is referred to as ONO antifuse.A second type of antifuse has a first metal layer disposed above and insulated from a semiconductor substrate as its lower electrode and a second metal layer as its upper electrode. The antifuse material comprises a layer of a material such as amorphous silicon and may be accompanied by one or more barrier layers separating it from the first and/or second metal layers. This type of antifuse is referred to as a MTM antifuse.Antifuse FPGA comprise three parts—programmable logic elements, IO blocks and programmable routing sources. Programmable routing sources include various length of conductive wires and large numbers of connect switches, which connect the programmable logic elements and IO blocks. Antifuses are the switches.Programmable routing sources contain large numbers of connect switches. Some of the antifuses, called"cross antifuses", are located substantially at the cross points of horizontal and vertical wires. These cross antifuses can beprogrammed to connect a horizontal wire with a vertical wire. Other of the antifuses, called"pass antifuses", may be programmed to electrically connect the source and drain of a pass transistor together so that two adjacent wires in a single track are connected together in series independent of the state of the pass transistor.The programming of antifuse occurs in two steps. First, multiple antifuses are partially programmed separately. Second, these partially programmed antifuses are connected together in series so that a programming current can flow through all of the partially programmed antifuses at once to complete programming of the multiple antifuses. By adding other branches to the programming path, the resistance of the programming path is reduced, thereby allowing a higher voltage to be dropped across the antifuse to be programmed during programming and thereby allowing increased current flow through the antifuse to be programmed during programming, so the resistance of the antifuse is more reduced.A programming pulse having a magnitude equal to the programming potential is applied cross the conductive electrodes of the antifuse such that the more positive potential is applied to the upper electrode of the antifuse. The disruption of the antifuse material is sensed by an increase in the flow of current. The programming pulse is extended for a fixed period of time following the current increase indicating the disruption of the antifuse material. The programming pulse is followed by a soak pulse. The magnitude of the soak pulse is equal to or less than the magnitude of the programming potential. The polarity of the soak pulse is such that the more negative potential is applied to the upper electrode of the antifuse. After the soak pulse, a program verification pulse may be applied to the anitfuse to determine if its resistance is low enough. The magnitude of the programming verification pulse is less than that of the programming and soak pulse and may preferably be from about 20% to about 30% of the magnitude of the programming and soak pulse. The polarity of the programming verification pulse may be such that either the more positive or more negative potential may be applied to the upper conductive electrode of the antifuse.The manufacture of antifuse is the main embarrassment on design of antifuse at present. The successful single testing proves the feasibility of the manufacture of antifuse.The research achievements in this paper lie in: we discuss systemically the internal programmable structure of antifuse FPGA, describe detailed the programmable structure and programmable mode. These are not reported inother inland paper. We also describe detailed the manufacture of antifuse with the single manufacture testing. The research achievements prove the feasibility of design and manufacture of antifuse FPGA.The result in this paper has important meaning of antifuse FPGA research, it supply the base of design and manufacture of antifuse FPGA.