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Design And Optimization Of MPEG4 Video Decoder Based-on SOPC

Posted on:2008-04-08Degree:MasterType:Thesis
Country:ChinaCandidate:T T XuFull Text:PDF
GTID:2178360212990452Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the fast development of digital technology, more and more kinds of digital applications such as MP3s, mobile phones, digital cameras are used or accepted by people . Inevitably, the video technology based-on hand hold applications becomes very important. Simultaneously, the digital products become smaller and more power efficient.The purpose of this paper is to choose SOPC technology and use this method to achieve real-time video decoding based on MPEG4 Simple Profile, and then optimize it to get a good performance. First this paper introduces MPEG4 video compression standards and chooses MPEG4 Simple Profile as our standard. Then this paper describes the concept of SOPC and its design flow, then design our decoder system based on SOPC. We achieve MPEG4 Simple Profile video decode on the system just designed. We analyze the problems we meet and optimize the performance by hardware acceleration which focus on the key functions in the decoder, then regenerate the SOPC system. Last chapter makes a summary of the whole paper and issues some points for the future work.After choosing MPEG4 Simple Profile as system video decode standard, this paper achieves QCIF (176*144) at 3-4fps without any optimization when system clock is 100MHz on the old SOPC system. Then QCIF (176*144) at 15fps is achieved through hardware acceleration optimization on the new SOPC which system clock is 100MHz.The whole decoder system is mainly just on one FPGA device, so it has a character of small volume and low cost.
Keywords/Search Tags:MPEG4, SOPC, FPGA, Video Decoder, Hardware Acceleration
PDF Full Text Request
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