Research And Implementation Of High-speed Communication Based On PCI Bus

The national 863 project"Development of Flight-controling computer system FC board"is to research and design an FC board compliant with CPCI bus standard, and to design a high-speed serial communication interface for implementing the high-speed serial communication in multi-computer systems.In this background, this thesis researches and implements a high-speed serial communication interface system based on PCI bus with EDA technique. At first, introduce some basic methods and implement the PCI bus interface with FPGA+PCI soft core. Then carry out the high-speed serial data transceiver with Rocket I/O and Aurora IP core, and design two asynchronous FIFOs to connect the PCI bus interface module and the transceiver module. Therefor, a high-speed serial communication interface system is implemented wholely and serial data is transcieved in high-speed through fiber channel. The whole design has been simulated, verified, implemented and downloaded in the FPGA.This design uses VerilogHDL and Xilinx ISE7.1 to complete the design, synthesis, place&route, and processes function and timing simulation in Modelsim, and uses Chipscope Pro embedded in ISE to analyze the design online. This system design follows the Top-to-Down method and is verified from inside to outside. The verification follows function simulation, timing simulation and on-board debug to make sure the design pass systemic test. Finally, the system is downloaded to the development board and work well after being verified and implemented.The system design is based on FPGA, so it speeds up test process and reduces develop period, and improves system performance. Besides, the interface system is compactable and feasible with high-speed data rate, and is useful for the further work.At last, this thesis makes a summary and put forward the further work.