Signal Integrity Analysis Of Power/Ground Net In High Speed Chips

The design and simulation of the power/ground net is essential functions of the electronic design automation tools for high speed integrated circuits. Traditional design and simulation methods can no longer meet the requirement well due to the increasing scale and velocity of the circuits. Therefore, how to design the power/ground net appropriately and simulate fast and precisely have become key problems in the development of automation design tools, which are also popular in the signal integrity analysis of on-chip power/ground net.The paper gives an introduction of the power/ground net design method for the high speed integrated circuit and voltage drop simulation after the author took part in the national scientific foundation fund project"The simulation and synthesis of the clock and power/ground network".The paper begins with the general method of the power/ground net design methodology. After the different kinds of topology of on-chip net are discussed,...