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Design And Simulation Of 2.45 GHz CMOS LNA

Posted on:2007-07-08Degree:MasterType:Thesis
Country:ChinaCandidate:L L HuFull Text:PDF
GTID:2178360212466794Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
According to the requirement of the communication of micro-satellite, a low noise and high gain radio-frequency front-end amplifier with an active Balun based on TSMC 0.18μm RF CMOS technology has been designed in this thesis. The layout was designed in Cadence Virtuoso.The characteristic of the RF device differs from the low frequency device, so the research on the RF characteristic of devices in CMOS technology is the key for designing the radio frequency integrated circuit. At first, this thesis studied the speed and the noise characteristic of the MOSFET, getting the relationship of fT and bias voltage, and the contribution of each noise source to the total noise. The characteristic of the capacitor and the inductor has been analyzed, and their equivalent circuit was presented also.Then, this paper has analyzed the common gate topology and the common source topology, discussed their advantages and disadvantages, getting to the common gate topology is excelled the common source topology in the characteristic of noise and gain. Then the current LNA design and optimization techniques were summarized. Those techniques include the CNM technique, the SNIM technique, the PCNO technique and the PCSNIM technique respectively. Among those techniques, the PCSNIM technique has analyzed carefully, which design steps has been given also.In the end, according to the requirement of the satellite communication system RF-frond end, The thesis put forward replacing the traditional Balun with the active Balun, and put a single-ended LNA in the front of the Balun, thus carrying out both the function of the LNA and Balun. The PCSNIM technique was applied to design a single-ended LNA. Another design from the consideration of the system is an active Balun. Then, a circuit has been designed combining advantages of each circuit. Simulation results of this circuit include noise figure of 0.844dB, gain of 26.65dB, Phase error is better than 0.2o, while gain error is below 0.1dB. Finally, the layout was designed.
Keywords/Search Tags:CMOS, RFIC, LNA, Balun
PDF Full Text Request
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