Design And Simulation Of Low Noise Amplifier For General Cell

With an explosive growth of microelectronics, micro-mechanism and advanced materials, micro-satellite has stepped into small-bulk,light-quantity and high-function-density recently.Research of General Cell based on SOC could reduce the bulk of the micro-satellite and improve the effective-load greatly,which is important for the localization,miniaturization,low-power,multi-function,high-performance and high-reliability of our satellite electronic system.So, we designed a fully integrated low noise amplifier (LNA) for 2.4GHz RF front-end receiver on satellite.According to the analysis of the whole communication system, we verified the feasibility of the design goal put forward previously and used a topology of cascode with source degeneration to design a differential LNA. During this precess, using the technology of optimizing the widths of both common source MOSFET and common gate MOSFET under a fixed power, we obtained a compromised result of power consumption and noise figure. Designed with TSMC 0.18μm CMOS technology and based on the RF integrated circuits simulation software-ADS(Advanced Design System), the LNA designed is matched, simulated and optimized, later with its performance analysis.According to the application background and the dismatch between single antenna and differential LNA,an active balun is needed and has been designed.Then we put forward a design scheme that does co-simulation of an active balun and a differential LNA on one chip together.At 2.45GHz, this LNA provides a forward gain of 28.931dB with a noise figure of 2.485dB,while drawing 19.1mA from a 1.8V supply. Also the forward and reverse reflection parameters are both lower than -25dB, and IIP3 is -18.4dBm.Gain error and phase error due to the balun are 0.114dB and 0.428 degrees, respectively. We completed the layout of the differential LNA, using the layout tool of Cadence----Virtuoso Layout Editor. The active area of the final LNA is 0.94mm×0.87mm.