Design Of 27 MHz CMOS RF Front-end For Receiver

With the continual progress in CMOS technology,the demand for low-cost and high-performance radio frequency(RF) receiver circuit has been on a great upsurge. Low noise amplifier(LNA),Mixer and bandgap reference are the key components in RF receiver , they affect the whole performance of the receiver.Low noise amplifier is the main part of radio frequency front-end receiver which amplifies the aerial input weak signal.It has a small noise factor,and a certain gain,so that can reduce the influence of noises to the received signal greatly from the behand stages of the system.The mixer is an important component of the wireless receivers.In receivers,mixers are down converters generally,they are after low noise amplifiers,moving the signal from radio frequency to the intermediate frequency. Bandgap reference circuit including bandgap voltages reference and bandgap currents reference,it provides the appropriate bias voltage and stable current.The designed module in this paper is uesed for remote control toy car receiver chip, it is enlarged a weak signal of 27.145MHz which is received by the antenna,then transform the signal to the size of 455KHz intermediate frequency signal,and then for the further processing.The chip uses CMOS 0.5μDouble Poly Triple Metal Mixed Signal Process technology to achieve, including the designs of low-noise amplifier (LNA), down Converte Mixer and the bandgap reference circuit. In this paper ,the LNA uses common-gate structure;the mixer uses the structure of single-balanced gilbert,and achieve the output signal conversion from the double to single by using current mirror; Bandgap reference provides two bias voltages which size are about 1.6V and 2.5V and stable current which size is 100μA to the LNA and mixer.The above three circuits and total cicuit are stimulated by using Cadence Spectre RF simulator ,including pre-simulation and post-simulation. The simulation results show that: the design of LNA, mixer, bandgap reference indicators are in line with the requirements.Finally, this paper give the chip layout of the overall circuit.The layout was designed with CSMC 0.5μm CMOS Technology by using the layout tool of Cadence Virtuoso Layout Editor. This paper has certain value for the RFIC design.