Research On Crosstalk Problems In VLSI

When process feature dimension decreases and operating frequency of chip dramatically increases, one of the challenges for application specific integrated circuit (ASIC) and system on chip (SoC) design teams today is ensuring signal integrity (SI). With the IC's higher speed,higher integration,higher density and higher performance,crosstalk has become one of the most important factors which can influence the IC's performance.Firstly,the dissertation discusses the crosstalk problem which constitutes the main SI problems in IC design and then makes a theoretical analysis on the crosstalk problems which include causes,influences,modeling calculations of the crosstalk problems;Secondly, the main progress of the VLSI physical design is introduced, with an amphasis on the arithmetic research and the related progress which can prevent the crosstalk,as well as the modified mothods,and then an improved arithmetic which can prevent the crosstalk problem is promoted;Thirdly,through the physical design of SoC chip used in Broad Band WLAN, the timing-driven physical design method is researched, and timing-driven optimization technology and mainly design flow is discussed in detail,meanwhile,we make analysis and optimization on the crosstalk noise of this chip and study the main problem and strategy in the process of crosstalk analysis.Furthermore,the paper provides the simulation and optimization results of crosstalk analysis using related EDA tools,as well as their compare.Especially,we provide a more reasonable method combining the different tools which obtains good results.