Study On The HMD's Image Souce's Driver&Controller Which Based On FPGA

Head Mounted Display(HMD) is a kind of near to eye microdisplay device, and its application prospect is very broad. The image source is the hard core of HMD, the R&D of LCoS(Liquid Crystal on Silicon) and OLED(Organic Light Emitting Diode) microdisplays needs to conquer many difficulties which related with material, fabrication, electronic circuit, optics and so on, these means a high technology barrier. The research on their control and drive technology is essential for the performance and operation, it is also very helpful for us to get our own intelligence property during the process of the HMD system design.The first chapter in this paper makes a full scale introduction about the concept, history, configuration & structure of HMD. The second and the third chapter mainly concerns on the LCoS and OLED technology, which contains their constructure, color generation, the control & drive technology and etc.The essential works in this paper is between chapter 4 to chapter 6.Chapter 4 proposes 2 algorithms which pointed to digital LCoS and analog LCoS, compared with other algorithems that have published, this 2 algorithm can achieve 8,64,4096 colors and 24bit true color, which means they have very good color adaptability. The clock computing after that mapped the 2 algorithms into the clock definition level of FPGA, which means good engineering implementation. The clocks computing here are based on the 2 algorithms, and these establishes foundation for the rest analyse & design works.Chapter 5 makes a converse-project analysis of a LCoS chip which from a HMD product, for the reason that we can not get the chips'pin definition, the sequential and the electric properties documents. After measurement by oscillograph, then combined with the works above, we got the pin definition and the basic sequential properties.Chapter 6 makes a design which points to the controller & driver for the LCoS chip, this work are based on the chapter 5 and 6, take the length of this paper into account, we mainly focus on the core part of the controller & driver, which is the FPGA logic controller. During the design, we use Xilinx Spartan 3 xc3s1000-5fg32 FPGA chip, use Xilinx ISE7.1i as IDE, use ModelSim6.0SE to simulate, Synplify Pro8.1 to synthesize, and Verilog HDL language to input. This chapter first proposes the design goal and system architecture, then divides its into 6 subsystem and makes detail implementation of each of them, from the simulation result we can get the conclusion that, the design...