Digital Power Line Carrier Channel

Digital filtering is one of the important content in Digital Signal Processing. Fir filter isused for many practical applications for its good linear phase character. Along with thedevelopment of PLD device and EDA technology, more and more electrical engineers useFPGA to implement FIR filter, as it not only meet the real-time requirement, but flexibility.In this paper, the research status of PLC(Power Line Carrier)is introduced both here andabroad. The paper does the research on the purpose ,value and development of digital PLCchannel, and introduce the design method of digital filter which is one of the main module indigital PLC. We apply the FPGA technique accomplish the design of FIR filter in the lowfrequency processing module.In the beginning, this paper researches several common digital filter design method,applying MATLAB to the common arithmetic and design method of the digital filter, givingthe correspond MATLAB coding. Later ,the paper brings forward the method by whichdistributed algorithm is applied to implement FIR filter based on the FPGA structural features.Discussing the disadvantage using DSP or FPGA, and why we chose FPGA to implement FIRfilter. At last, the Cyclone series device of Altera Corporation is used to synthesize andsimulate, apply VHDL compile the correspond code, and download in the QuartusII toverifiy.