Research On The DSP-controlled Multifunctional Data Acquisition System

The DSP-controlled multifunctional data acquisition system is designed with CPLD architecture to synchronously measure the multiple channel signals. This system could be applied flexibly to measure and identify the magnitude and phase of the various signals in such tough environments as the modern seismic exploration and electric method of the geophysics. In general, this expandable and adaptive data acquisition system is the future trend with promising application field.This thesis gives a brief introduction to the application of DSP plus CPLD in DAQ. Based on the specific requirement of geophysics instruments, the Schematic, System hardware architecture as well as the supporting software are illustrated carefully in the respective chapters. The hardware setup of the DAQ system consists of two modules: the analogue circuit and the digital circuit. In the analogue module, synchronous amplify, acquisition, anti-alias filter and power frequency notch filter are designed. While in the digital parts, the DSP core completes the consequent processing to measure signal phase. And the CPLD part controls the address/data allocation and multi-channel clock synchronization. The design of hardware is discussed in detail. An approximately linear phase wave filter is designed to replace the signal process circuit used ever after analyzing the phase wave on the filter. The detail circuit diagram of amplifier is also offered. The CPLD download cable, by which the timing simulation of CPLD's controlling 16-bit serial interface ADC is achieved, has been made successfully. The interface of large volume dual port RAM and DSP+CPLD is realized creatively. A new software method of measuring phase is decided for the reason of large error of hardware method, which is analyzed in detail. The paper gives a technique of expand extern memory in a DSP system and designed the interface between DSP and upper PC. Practical experiences of anti-jamming in design of PCB are summarized except for the boot loading of DSP.The software design includes two parts. One is the FFT, which is core algorithm in this DAQ system. Also some codes with schematic is given in this thesis. The other part is the upper PC, which implements two functions: human-machine interface and the serial port communication. A detailed flowchart as well as the source code is provided consequently.In the following chapters, the debugging steps are discussed to give a full and precise...