Font Size: a A A

ASIC Design Of Driver & Controller For Small Dot-Matrix Gray Scale STN LCD

Posted on:2006-04-11Degree:MasterType:Thesis
Country:ChinaCandidate:J S HuangFull Text:PDF
GTID:2178360182971725Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Recently liquid crystal display (LCD) becomes very popular in flat-panel displays for its low power, mini bulk, ingenious appearance and cheap cost. Although a more complex driven circuit and a more difficult interface with SCM, the design of LCD has developed gradually into a mature level with the rapid development of VLSI technology. Among them, Super Twisted Nematic (STN) LCD is applying in consumer and communication electronics widely. In this paper, the design of 4-level gray scale graphic dot-matrix (128×129), with Serial Peripheral Interface (SPI) and 8-bit parallel MPU interface, multi-function LCD driver and controller IC is demonstrated. It used the method of PWM and FRC to generate adjustable gray levels, which can be adjusted to accord with the characteristic of the LCM best by changing the values of the gray palette register. The function of partial display, screen scrolling, page switching and hardware picture reversion is added to the design. Finally the improvement of display effect is taken into account. Based on the "Top-to-down" methodology, the hierarchy partition from top behavioral level to bottom functional blocks had been framed. Meanwhile, the direct schematic design of some subcircuits had also been conducted in reference to other function-like circuits, using the "Bottom-to-up" methodology. Then, the whole chip simulation and verification were conducted to examine the matching between the design and the requirements of specification. According to the ASIC design flew, the top-level architecture and specification of the whole design of this dot-matrix LCD controller/driver chip were discribed first, then the paper put emphasis on the design of some critical blocks, such as interface block, timing and control block, SRAM, driver block and power block. When circuit design and function verification had been finished, the physical design in Chartered 0.35 μm CMOS High Voltage process and post-layout verification were accomplished subsequently.
Keywords/Search Tags:LCD driver and controller, ASIC, MPU interface, AC driving, Pulse Wide Modulation/Frame Rate Control
PDF Full Text Request
Related items