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Design And Research Of Driver & Controller For 4 Gray Scale STN LCD

Posted on:2006-09-06Degree:MasterType:Thesis
Country:ChinaCandidate:Z SunFull Text:PDF
GTID:2178360182971736Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
For its advantages of portability, mini bulk, low power, non-radiation danger, flat display and steady image, LCD (Liquid Crystal Display) has been more and more widely used in the field of image display, which certainly will induce extensive research and development of LCD driver & controller. In this paper, the design of a novel STN LCD driver & controller IC with 128×129 pixels is demonstrated. This chip not only supports many mainstream MPU interface, but also integrates timing control circuit, power supply circuit and 32Kbits SRAM, and combines frame rate control & pulse width modulation method to realize 4-level gray scale. So it provides an ideal scheme for graphic dot-matrix LCD systems. Based on the "Top-to-down"methodology, the hierarchy partition from top behavioral level to bottom functional blocks had been framed. Meanwhile, the direct schematic design of some subcircuits had also been conducted in reference to other function-like circuits. Besides, the whole chip simulation and verification were conducted to examine the matching between the design and the requirements of specification. Then, completed the front-end design. The paper puts emphasis on the whole design of this LCD driver & controller. Some key modules are discussed in great detail, incluing interface circuit, timing control circuit, FRC/PWM function circuit, power supply circuit, drive circuit, Oscillator, and so on. Based on chartered 0.35um CMOS high voltage technology, Verilog HDL,Modelsim and Spectre simulator are used to verify function and timing of our design met with the initial specification. At the same time, multiple popular low power technologies, such as Dynamic Power Management, Gated clock, Bus-separation, are used in different design levels, which reduced the chip's power consumption remarkably. After completed mixed-signal simulation, layout design and post-layout verification, the chip can be tape out.
Keywords/Search Tags:Liquid Crystal Display, Frame Rate Control, Pulse Width Modulation, Line Scan, Frame Synchronization, Power Management
PDF Full Text Request
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