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The Verification And Test Of Satellite Data Receiving Chip IPoD For DVB

Posted on:2006-10-27Degree:MasterType:Thesis
Country:ChinaCandidate:F LuoFull Text:PDF
GTID:2178360182483487Subject:Information and Communication Engineering
Abstract/Summary:PDF Full Text Request
The verification and test of chip are paid more and more attention duringthe development of modern chip. It is not only because verification and testhave more proportion during developing chips, but because engineers confrontmany challenges in verification and test. This paper particularly presentsfunction verification and test of satellite data receiving chip named IPoD forDVB on the basis of it's requirement for development.For function verification, the completely verification platform of the chipis built by using the third party's open verification IP core, the behaviormodel of Tuner data input interface and corresponding peripheral interfacesbuilt by ourself. The strategy of verification is built by adopting verificationmethod based C language reference model, reusable verification structure andgrey-box verification mode. We can quickly locate the wrong block, unify theblock-level and system-level verification, and save plenty of simulation timethrough adding some monitoring point inside the system of the chip during thesimulation. All above ensure that we can successfully verify all the functionsof the chip, and ensure the reliability, maintainability and efficiency offunction verification. Finally, we get good verification result.At the same time, we take into account the factor of testability. Bycombining with scan insertion, boundary-scan insertion and BIST, the schemeof testability of the chip can be reality. Furthermore, we especially considerthe test of PCI core and APLL integrated into the chip. The smallish and finetest patterns are generated by client test pattern generating tool provided byFujitsu. As a result, all test patterns ensure high fault coverage of the test ofthe chip, and establish a good foundation for manufacturing the chip.This paper favorably achieves the verification and test of IPoD. Thechip's development pass through the verification of FPGA system prototype,as indicates the effect of function verification. The generated test patterns alsoconforms to the requirement of tester, as are verified by Fujitsu stuff focusingon back-end too.
Keywords/Search Tags:IPoD, ASIC, Function Verification, Design For Test, Test Pattern
PDF Full Text Request
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