Study On Key Techniques Of Digital Up/Down Conversion And Digital Phase-Lock-Loop

The key techniques of Digital Up/Down Conversion in Software Defined Radio and All Digital Phase-Lock-Loop (DPLL) are discussed in this paper. The implementation of cascaded interpolation and decimation filters and LL-DPLL using filed programmable gate array (FPGA) is presented. Firstly, the basic theory of digital up/down conversion is introduced, and then, the available structures of Cascaded Integrator Comb (CIC), which includes the traditional CIC, Sharpen CIC (SCIC) and CIC+ISOP (Interpolated Second-Order Polynomial), are compared. Secondly, a new non-recursive multistage structure is proposed based on the theory of poly phase decomposition. This structure is more flexible and can be designed using module oriented method of software engineering. Meanwhile, as it is non-recursive, this structure can be pipelined, which can decrease the power consumption of system and increase the speed of system. The simulation result before synplicity and after synplicity in FPGA design is presented in the last part of this paper. The theory of DPLL and its components combined with the implementation of LL-DPLL are also presented in this paper.