Design Of Radar Signal Processing Hardware System Based On TMS320C6416

With the complexity of radar signal processor and the computation of radar signal processing being rising, a hardware platform for radar IF signal processing is developed, which is based on DSP TMS320C6416 and FPGA EP2C35F484. Chip selection, hardware structures, high-speed PCB design, hardware system implementation and system debugging are discussed detail in this thesis. The main works are as follows:1. The algorithm complexity and storage capacity for radar IF signal processing system are discussed. This is the basis of the hardware system design.2. According to algorithm complexity, some fundamental chips for hardware system are chosen, and they are TI's high-end DSP chip, TMS320C6416, and ALTERA's FPGA chip, EP2C35F484.3. According to the system requirement, radar IF signal processing hardware system schematic is designed using Cadence electronic design automation (EDA) software, which includes analog-digital conversion circuitry, memory expansion, power management, clock system, peripheral interface, et al.4. The PCB system for the radar IF signal processing is designed using modern high-speed PCB design technology, and the specific solution for high-speed signal integrity issues encountered in PCB design is also discussed.5. The whole hardware system is debugged, including AD, front-end chips, FPGA and DSP data communications, peripheral interface.6. The down-conversion algorithm of radar IF signal preprocessing is implemented in FPGA.In summary, based on in-depth analysis of radar IF signal processing algorithm, a strong real-time hardware system is developed integrating DSP and FPGA, and it could supply a reliable hardware platform for radar IF signal processing algorithms with high dynamic performance.