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Research On Built-in Self-test For Multi-Port SRAM

Posted on:2012-03-03Degree:MasterType:Thesis
Country:ChinaCandidate:H K DanFull Text:PDF
GTID:2178330338496071Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Embedded memories have been widely applied to the field of system-on-chip (SoC), and the domination of SoC also have transformed from the logical unit into the memory. Multi-port SRAM which can access the memory cells simultaneously through different ports have been applied massively in SoC. In order to improve reliability of SoC, the techniques of embedded memory self-test and self-diagnosis have significance and practical value.This paper is research on built-in self-test and built-in self-diagnosis technology for embedded multi-port memory. Firstly, the background,meanings and rationale of embedded memory built-in self-test (MBIST) and memory built-in self-diagnosis(MBISD)are researched. Secondly, In order to detect inter-port faults in multi-port SRAM,this paper proposes a novel algorithm which is called w-r Algorithm and w-w Algorithm based on structural fault model. w-r Algorithm is improved from March C- Algorithm, its test addrest to the concurrent port should be addr±2 is demonstrated; w-w Algorithm is proposed to detect the faults stimulated by concurrent writing(to different addrest).Thirdly, In order to diagnose inter-port faults of multi-port SRAM, an effective defect diagnosis algorithm called DDA is proposed. It is composed of algorithm WDDA and algorithm BDDA, which can diagnose the defects between word lines and bit lines respectively. So it can put forward the appropriate proposal for the fault repairing as well as memory's manufacturing. Finally, Based on the experiment of 32×8 bit double port SRAM,we conclude that it has 100% fault coverage with low time complexity.
Keywords/Search Tags:multi-port SRAM, inter-port fault, BIST, diagnostic ratio, BISD, time complexity
PDF Full Text Request
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