Performance Evaluation Of Distributed Multiprocessors System On Chip Based On NoC

With the development of IC fabrication technology, the number of processing cores integrated into a single silicon chip is increasing. In the meantime, the requirement of market for high performance embedded system-on-chip rises quickly. In that case, MPSoC (Multiprocessors System-on-Chip) is proposed to satisfy the market demand. NoC (Network-on-Chip) is wildly accepted by research groups as the substitute of BUS, which was traditionally used as communication architecture for inter-cores communication, because of its performance in flexibility, efficiency and power consumption. However, it is so complex to design an MPSoC based on NoC, that designers need a set of high performance auto-design assistance tools to help them, of which performance evaluation module is one critical part.This thesis focuses on performance evaluation phase, which is part of the Software and Hardware co-design flow for MPSoC based on NoC. There are lots factors effecting the final performance of system, such as task partition and mapping, switch strategy and topology of NoC. The System Communication Performance Evaluation Platform (SCPEP) designed in this thesis could feedback detailed information to system designers. It also uses a Puppet Program Module to overcome the time-consuming parallel programming phase.In this thesis, we will introduce the target multi-processor platform first, including Hardware and Software architectures, performance evaluation parameters, and also the introduction of M5 simulator. After that, the implementation of SCPEP will be discussed, including details in three modules. And, there is the analysis of factors that effect communication performance, pointing out the time OS takes to response interrupt is critical. At last, there is a experiment tells the differences between SCPEP and SystemC performance evaluation platform, which make the SystemC performance evaluation platform unsuitable to MPSoC design.