| With the development of electrical information technology and computer architecture design, embedded system is widely used on every aspect in our daily life. Its performance and requirement is getting higher and higher, especially in use of low-end electronic products with multi-media processing. Meanwhile, MPSoC (multi-processor system-on-chip) architecture is more and more used in the design of embedded system, which can be a great benefit to performance improvement.Embedded MPSoC system has brought great challenge in embedded application program design, which needs to be divided and scheduled properly based on the exact embedded MPSoC hardware platform. The application task must be assigned to different processors threads.Task scheduling in embedded MPSoC can be classified into two types: dynamic scheduling and static scheduling. Compared with dynamic scheduling, static scheduling has advantage such as easier implementation, shorter overhead, and so on, which can be made better use in embedded system design.Static scheduling requires that program must be divided by programmer during the developing of embedded MPSoC. Different division plan can result in different execution speed. This paper mainly illustrates an evaluation design for embedded MPSoC, which can evaluate the performance of program running with different division plan in embedded MPSoC. The evaluation design has run on the field programmable gate array platform and can provide the information, such as speedup of program partition, overload of processors, inter-processor communication overhead, system scheduling overhead, and so on. Further developing of application program can benefit a lot from it. |
