The Design And Verification Of SPI Controller Based On AXI Protocol

With the rapid development of electronic design technology, in recent years, System-on-a-Chip(So C) design technology has been widely used in various fields of integrated circuit development. Users want their design can communicate with more electronic devices. Therefore, many chips are now supporting the traditional Serial Peripheral Interface(SPI), Serial Bus Universal(USB) and other electronic equipment interface and so on. Among these protocols, SPI protocol has been widely used in low speed external equipment because of its simple circuit structure, reliable communication and many other advantages.Through the research of Motorola’s SPI bus protocol and ARM’s Advanced e Xtensible Interface(AXI) bus protocol, this paper designed a SPI controller which can support AXI bus transmission. This SPI design realized the support of multi request function and the support of chaotic sequence access. This paper focused on the design and verification of the SPI controller module. Firstly, according to the SPI protocol principle, this paper proposed the overall structure of SPI controller module. Meanwhile, according to the characteristics of AXI protocol’s ports, the interface signals of SPI controller module were extended. With the increasing of the AXI bus communication interfaces, the SPI controller can communicate with the AXI bus, which can be widely used in different So C systems. The SPI controller module was composed of control register, extended registers, data registers, state registers, SPI control module, reading and writing module, a label identification(ID) control module and shift registers. The SPI controller module supports four transmission modes: read request, read request response, write request and write request response. Secondly, based on completing the Register Transfer Level(RTL) design of the SPI controller module, a number of functional points were verified. Based on the method of Verification Methodology Manual(VMM), this paper used System Verilog language to build a hierarchical random verification environment for the SPI controller module, therefore, the SPI controller module was fully verified. Thirdly, this paper used the Verilog Simulator Compiler(VCS) of Synopsys to calculate the code coverage of RTL code, analyzed the code coverage report, added restrictions appropriately to improve the code coverage rate. Then, added functional coverage group, calculated function coverage. Finally, synthesized the RTL code, evaluated the area consumption, timing consumption and power consumption of the SPI design.The results of verification show that the SPI controller module fully compatible with the SPI protocol, achieved the expected goal, can be flexibly applied to typical So C system which based on AXI bus protocol, can communicated with many electronic equipments which has SPI interface. In addition, based on the VMM method, the random verification environment with configurable parameters can effectively improve the verification efficiency of the design.