Design Of Distributed Target Echo Simulator Based On FPGA

Echo simulator has a very important role in modern radar research fields. It can reduce the cost of radar, and it can also be used to verify the accuracy and stability of radar algorithms. Therefore, a comprehensive and stability echo simulator is usually required in the radar field.In this paper, we design an echo simulator which is used a FPGA as the control core. The whole system consists of motherboard, memory board and analog board. The thesis demonstrates the various chips used on the storage board, with emphasis on the design ideas of system software and the implementation of each module. In addition, this thesis introduces the human-machine interface and the shortcoming of the system which are used eventually.