Analysis Of Jitter In High-Speed Serial Communications System And Realization Of Clock Jitter Decomposition By Frequency-Domain Analysis

With the improvement of the data rate in communication systems, jitter in High-speed serial system is becoming more and more serious. At the same time the impact of jitter on the system is also increasing doubly. When the data rate reaches a level of more than Gbps, jitter is becoming a key factor that determines the performance of the system. Therefore jitter must be controlled within some desirable range to insure the data transfer reliability. Now jitter analysis has become a problem of particular concern to high-speed system designer.This paper firstly introduces the development of the data transmission system and the impact of jitter on the communication system, then points out the importance of jitter research. The definition, quantification and measurement of jitter are also introduced in this paper. Then based on the origins and characteristics, the classification and modeling of jitter are described. According to types of jitter, we realized the decomposition and quantification of clock jitter. Based on Windows operating system we have developed the jitter analysis and decomposition application with the tool of VC++6.0. Jitter decomposition algorithm in time domain and frequency domain is discussed in detail. Examples are also given for validating the algorithm. The jitter analysis and decomposition application introduced in this paper runs well in Windows operating system; realizes jitter decomposition and quantification.