Research On Design Methodology Of Low-Swing Interconnects Based On NoC System

As the process scales down and the developments of the design methodology, the scope of System-on-Chip (SoC) becomes larger and larger, and more and more IP cores can be integrated in SoC. The conventional bus architecture can't adapt to this development, therefore, Network-on-Chip (NoC) based on the computer network concept has been proposed and widely investigated. However, many research results show that, the power consumption and delay of interconnects between NoC routers are still significant factors limiting the system performance. The research of interconnects has become a hotspot of present academic field.The power consumption and propagation time of interconnects can be effectively reduced by using the low-swing techniques, thus adopting low-swing techniques in NoC system is an effective solution. On the basis of summarizing kinds of present low-swing circuits, a novel low-swing transceiver circuit is designed based on pre-emphasis technique. The transceiver combines the designed FIR filter-res transmitter improved based on the 2-tap FIR filter and the double-tail sense amplifier, and the low-swing technique is also applied in source-synchronous clock scheme. Then the transceiver circuit is applid in the interconnects between NoC routers, and simulation results show that, compared to the conventional CMOS full-swing circuit, the designed NoC interconnect architecture can achieve a higher data rate with less power consumption.