Research On 60GHz LFMCW Radar Signal Processing

Millimeter-wave radar has been widely used in military and civilian fields because of large bandwidth, high resolution, small size and all-weather characteristics. Due to the restrictions of devices and test equipment, domestic researches on the millimeter-wave radar are mostly concentrated on 40GHz band below. In contrast, 60GHz band has wider bandwidth, which means higher resolution. This thesis focuses on the research on 60GHz LFMCW (Linear Frequency Modulated Continuous Wave) anti-collision radar signal processing.We first describe the system design of the radar signal processing platform. The selection and parameters of main components of 60GHz front-end are presented, and the baseband circuit and the power circuit are described with detailed circuit schematic depicted. Then the intermediate frequency (IF) signal processing circuit, including a low noise amplifier (LNA), a high pass filter (HPF), two variable gain amplifiers (VGA) and a low pass filter (LPF), are discussed. With this circuit, the out-band noises are filtered, and the maximum gain approaches 110dB.A segmented distance and speed extraction algorithm, which combines both the advantages of fixed IF method with narrow-band filter and digital signal processing method with FFT operation, is proposed in this thesis. By narrowing the IF signal bandwidth, this algorithm can significantly improve the signal-to-noise ratio (SNR). Several target distance measurement experiments have been conducted in the playground. The experiment results show that good performance is achieved by using the algorithm.In the following we introduce the hardware implementation of baseband signal processing, which can be divided into two parts, that is, FPGA processing part and DSP processing part. The FPGA processing including VCO modulation module, signal acquisition module, automatic gain-control module, and FFT module are presented and discussed. Then the DSP processing including DMA data transfer module, radar data processing module, liquid crystal display module and bootloader module are described. In addition, the collaboration and data exchange between FPGA and DSP have also been implemented.Finally, we summarize the finished work of this thesis, and discuss the follow-up work.