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The Reserch Of Coherence Protocol For A Directory Based On L2 Cache In The Multi-core Environment

Posted on:2011-04-30Degree:MasterType:Thesis
Country:ChinaCandidate:T JingFull Text:PDF
GTID:2178330332459851Subject:Computer application technology
Abstract/Summary:PDF Full Text Request
With the continuous advancement of processor manufacturing process as well as the practical application needs, multi-core structure has become the development trend of high-performance microprocessors. However, at the same time also brought a number of new problems, there have been no in single processor, arising in multi-core processor system cache coherence problem is studied in computer architecture of today's hot issues.Increase the current rate of processor performance well above the pace of development of memory, however, the traditional multi-processor system in order to ensure the cache consistency, the consistency of the information data block to the directory means are generally stored in memory, so that , when a core need for a shared data block read or write operations need to find or modify the memory directory information, which will increase the processor core's access memory delay, while the longer fetch latency significantly limits the system performance.The cache works in multi-core environment, the basic structure and working principle of cache coherence protocols such as a more in-depth study carried out on the basis of this paper, presents a model of L2 Cache has be designed to the traditional L2 Cache was divided into two part, that was part of the DLDI and FDI, which DLDI part in addition to storing data on a recent visit to the local kernel, but also additional data blocks stored directory information, while the FDI part of the store was partially replaced from the DLDI data block out the directory information, so that when the processor need to find a data block or change the directory information, the L2 Cache can be directly accessed , thus reducing the processor fetch delay; in this model of L2 Cache support, directory-based cache coherence protocol has been improved to ensure that the directory information stored in L2 Cache proposed in this paper model will still be able to ensure that data consistency of multi-core processors; Finally, the system was tested with the help of GEMS. Experimental results show that the directory information was stored in the paper presented in the L2 Cache and directory-based cache coherence protocol improved, reducing the multi-core processors fetch latency, improves system performance.
Keywords/Search Tags:access memory delay, Cache coherence protocol, Multi-core processors, directory protocol
PDF Full Text Request
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