The Design And Simulation Of High Efficient Cache Protocol In Multi-processors System

With the development of our society,man' s demands for high computing speed and wide computing scale are raising. Because the performance of single microprocessor can' t be improved indefinitely due to the limitation of speed and machining technology of chips,so came the massive parallel processors system. But this led to some new problems. How to keep data consistency in multiprocessors systems is one of the hot problems in the world.Today,the performance of processors is increasing at a faster step than that of memory. The long delay of memory access time has limited the development of computer performance. In order to ease up the gap between CPU and memory,cache is introduced between them. But in a multiprocessors system,there may be several processors have read the same data,and then one processor will write it. This time,the copy of the data in the caches of other processors will be out of date. If the processor whose cache has the old data can' t be informed in time,it may lead to wrong results. The memory consistency protocol is used to insure the right processing order of program under this situation. But the memory consistency protocol will use system resources,has effect on system performance. Thus,it is necessary to have an efficient memory consistency protocol.In multiprocessors systems,cache coherence is always an important issue. Although many research results have been provided,there still are many fields need further research,such as remote access delay,system communication,false sharing of data.In this paper,we made some analysis on conventional cache coherence protocols. We provide one way to reduce remote access delay - adding a router-cache in routing components. When the message that containing data passes by,router-cache keeps one copy of the data according to the situation. When new request that asking for the same data comes,router-cache can provide the data. In this way,router-cache can reduce the response time of remote access and the costs of memory directory. Adding cache in routing components will increase the complexity of router and its cost. But with the advance in large-scale integration technology,it is possible to design and produce routers with high complexity. Thus we can improve the performance of multiprocessors system by increasing the complexity of hardware.Then,we give some description about the working principle,organization,function of router-cache and where it should be. We also gave out a cache coherence protocol for multiprocessors systems with router-caches.In order to give simulation about the performance of system with router-caches,we set up a new simulator after giving necessary revision on the RSIM simulator(a simulator for shared memory multiprocessors system)designed by Rice University.At last,we run seven standard applications on the simulator to evaluate the effect of router-cache on system performance. We also simulate under different environments. The results of simulation show that:In systems that have a lot of of procressors,using router-cache can improve the speed of multiprocessors systems under most conditions. To some applications that have low hitting rate of router-cache,using router-cache would not affect system performance heavily. Router-cache can also reduce the workload of node bus and memory,so it is useful in systems whose performance are limited by node bus or memory. Based on the results of simulation,we also made some revisions about the organization of router-cache. The revision can reduce the hardware costs of system while keep system performance.In summery,using router-cache is a method worth further research to reduce remote access delay and improve system performance.