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The Research And Design Of Video Collection System IP Core Based On I2C Bus

Posted on:2006-10-25Degree:MasterType:Thesis
Country:ChinaCandidate:F Q YingFull Text:PDF
GTID:2168360155951559Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
This paper gives a brief introduction on the principle and key technology of video signal digitalization, which is a necessary part of Multi-media communication. A design of real-time video capture was given, which is applying video conferencing, video mail and so on. The video signal collection system is the front part of the digital real-time wireless Multi-media system. Its video signal can attain ideal signal that can be used for the wireless transmit by compressed. A general design scheme of IP core based on IIC bus was given, sustained by VHDL senior synthesis system, The design process of module and HDL programme coeersponded is given。 The result of synthesis on MAX+PLUS software flat roof provided by ALTER CO.and timing simulation is given。 The solution is configure of OV7620 by EP1K30TC144 . The output video data format can be changed by modifying the procedure according to the actual circumstance. Modifying the procedure will change OV7620 chip work method, then the video data format matches oneself need. So the procedure is very useful. In my graduation design, the video is YCrCb 16bit 320 × 240 digital output format and conform to CCIR656 standard.
Keywords/Search Tags:IIC bus, Video collection, FPGA, VHDL, CCIR656, YcrCb
PDF Full Text Request
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