The FPGA Implementation And Research Of The Embedded USB Device Processor

USB(Universal Serial Bus) is specified to be an industry standard served as data-transmission between PC and all kinds of peripheral equipments. It has the merits of speediness, easy-configuration and setting, self-powered and hot attach & detach. USB version 1.1 supported two speeds, a full speed mode of 12 Mbits/s and a low speed mode of 1.5 Mbits/s, USB 2.0 even 480 Mbits/s. USB is much faster than UART. The USB transceiver is as cheap as RS232 line driver/receiver. So it brings about the development of the processor of USB device.A hardware implementation of the processor of USB device is presented in this thesis. It describes how to design its RTL hardware implementation, its FPGA prototype verification and ASIC research, including modeling, arithmetic simulation, RTL design, and its simulation and how to implement in FPGA. This design reaches the velocity of 48MHz, and the area of no more than 10K gates. Its fine quality guarantees satisfaction of Soc design.These works are presented in this dissertation:1) According to USB version 1.1, one hardware implementation is presented and every module is accomplished successfully. Two different modules that supervise data-transmission and bus enumeration respectively share the same packet-processing channels. The data-transmission module use FIFO as its data source or sink and the bus-enumeration module depends on ROM, which can be configured before synthesis.2) For data-transmission module, different endpoints are not assigned as individual FIFOs but a general FIFO and a general endpoint number register. It decreases the numbers of FIFO and leaves workload for other functions.3) The thesis makes a flexible system modeling through Lab View, a graphical programming language tool. Labview uses icons instead of lines of text to create applications. In contrast to text-based programminglanguages, Lab VIEW uses dataflow programming, where the flow of data determines execution. Users can input their own data and the modeling can produce output data, which can be compared with the simulation of RTL design.4) The thesis develops FPGA research on this embedded USB device processor mainly. The testing data is sent to FPGA board through serial ports. This processor reads the data and sends to PC host. Ni-VISA served as host will analyze data received from FPGA board.