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Design And Realization Of ADSL Protocol Chip Based On FPGA

Posted on:2006-04-11Degree:MasterType:Thesis
Country:ChinaCandidate:Y F LiuFull Text:PDF
GTID:2168360152982559Subject:Signal and Information Processing
Abstract/Summary:PDF Full Text Request
With the development for Internet is becoming faster and faster, the communication network is running for significant innovation, the communication service is being changed from the traditional narrow band service mainly for telephone service to multimedia broadband service, which combines the high-speed voice, data and digital image signals together. The paper discusses the structure of ADSL protocol chip, key technology, simulation and realization.In this paper the following works on overview of design of protocol chip:(1) This paper presents the signification of the protocol chip, the main fields of application and developing status in the world. Summing up the broadband networks technology, FPGA, and hardware description language. It is the foundation of protocol chip design.( 2 ) Designed and realized Rocket chip, demonstrated the realized key technology of the chip, Improved the schedule algorithm, flow shaper algorithm and hash rapid lookup for the request of project. Presented alone memory and shared memory combined means, it settled the memory problem; Analysed and calculated the conflict probability of hash rapid lookup, brought forward the architecture of hash rapid lookup; Applied the memory self-check and bad memory isolation means, it enhanced the disposing errors capability; Based on the multicast theory, it presented the multicast architecture adapting to FPGA, and realized the multicast function in Rocket chip.(3 ) Applied an innovative simulation method simulated the Rocket chip, In the simulation, it has realized the combined simulation of hardware description language and high-class language. Through applying script language realized the automation of simulation. The simulation means accelerate the simulation. The result of simulation showed the request of function and performance.
Keywords/Search Tags:FPGA, Hash algorithm, WRR algorithm, Simulation, Synthesis, ADSL
PDF Full Text Request
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