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Design And Implementation Of A Noise Acquisition/Monitoring System

Posted on:2005-06-08Degree:MasterType:Thesis
Country:ChinaCandidate:L OuFull Text:PDF
GTID:2168360125964471Subject:Circuits and Systems
Abstract/Summary:PDF Full Text Request
Nuclear power applications in China are becoming more and more popular, such as nuke,nuclear powered submarine, and so on. Nuclear power benefits mankind in many aspects, but it is very dangerous once accidents with nuclear powered facilities are occurred. Therefore the monitoring one nuclear power facilities is highly necessary and of primary significance. The monitor equipments for detecting nuclear noises generated by nuclear power facilities are crucial for safety of running such facilities. Main goal of these kind of equipments is to collect and analyze the background noise , the laxity noise of device , mechanical shake noise, neutron noise, the leak noise of pressure accompanied with the nuclear power facilities.We use large-scale FPGA (Field Programmable Gate Array) to design the digital system used in the mentioned above monitoring equipments. During the design and implementation of the FPGA, a lot of IP (Intelligence Property) cores are used together with the UP TO DOWN design methodology. Examples of the IP core we used are the following: FIR digital filter provided by Altera Corp. SDRAM Controller,AT96 BUS Controller and 1024 point-FFT produced by Xilinx Corp. Our design and implementation approach in this way not only reduce significantly the time to the market for the products but improve the system performance in many aspects as well.. Besides, we use HDL to emulate our system and replace lots of circuitry debugging resulting in R&D time savingfurther..We use embedded computer and embedded RTOS, the computer language for bottom layer is ANSI C, so the system have good advantage for being planted and maintenance.When designing the monitoring system, the author carries out simultaneously theoretical analysis and improvement on conventional radix 2 Fast Fourier Transform (FFT), Split Radix FFT (SRFFT), our algorithms can save 33% multiplications for DFT approximately as compared to the traditional algorithms. Because butterfly-knots operation requires no more memory cells, SRFFT can be realized by DSP. But it's complicated to locate butterfly-groups, in this case lookup-table should be calling for.
Keywords/Search Tags:FIR Digital Filter, FFT, Noise Monitoring, FPGA, IP-Core, HDL
PDF Full Text Request
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