Research On Denoise Technology Of CCD Camera Based On Digital Filter

CCD detectors are widely used in astronomical observation,aerospace,scientific research and space debris detection due to their high sensitivity,wide dynamic range and low noise.The traditional CCD cameras use analog correlation double sampling circuits to reduce the noise of the system.This method can suppress the reset noise very well,but it cannot achieve the optimal suppression of the noise.Therefore,exploring new low-noise CCD camera noise reduction technology has important research significance.With the continuous development of digital filtering technology,CCD digital noise reduction technology,as a new and low-noise CCD signal processing technology,is gradually being applied to aerospace exploration and other fields,which can well improve the background of dim sky Detection capability.This paper analyzes the noise source and noise characteristics of the CCD camera system,and establishes the CCD signal and noise model.And on this basis,several digital correlation double sampling noise reduction processing algorithms are optimized and designed,mainly including differential mean filtering,optimal Gaussian coefficient weighted filtering,optimal hyperbolic coefficient weighted filtering and optimal filter coefficients;Simulation experiments on various filter coefficients have been carried out,and the denoise performance of various algorithms on different noises has been verified.In order to obtain the real CCD signal to further verify the algorithm,this article establishes a CCD signal acquisition experimental platform based on the data acquisition card,and collects the CCD signal to the computer to verify the performance of various algorithms.The experimental results show that the denoising performance of the optimal filter designed in the experiment is 22%–32% higher than that of the digital filter with kernel distribution coefficient,and 60% higher than that of the traditional correlated double sampling technology.After completing the algorithm verification,based on the existing CCDcamera platform,this paper designs a video signal processing circuit board to replace the traditional circuit board using analog correlation double sampling technology,and transplants the digital noise reduction algorithm to FPGA to achieve pixel-level,realtime processing.Compared with the traditional signal processing circuit,this circuit removes the analog CDS circuit,and uses a low-noise,high-sampling ADC(LTC2217)to redesign the video signal processing circuit board;The drive timing of the components on the circuit board was designed through FPGA,and the design of asynchronous FIFO memory and the transplantation of digital filtering and noise reduction algorithms were also completed;This paper builds a CCD camera test platform,tests and verifies the various modules on the circuit,and then realizes the pixel-level,real-time noise reduction processing,which meet the design requirements;Finally,the low-noise CCD camera imaging test was completed.At a readout rate of625 KHz,the noise level of the CCD camera system based on digital filtering and noise reduction was increased by 21.3% compared with the traditional analog noise reduction technology.