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The Design Of The Multi-Subband Variable Filter And FPGA Implementation

Posted on:2017-04-29Degree:MasterType:Thesis
Country:ChinaCandidate:S W ZhuFull Text:PDF
GTID:2308330509459510Subject:Engineering / Electronic and Communication Engineering
Abstract/Summary:PDF Full Text Request
Generally, in order to change the frequency response of variable FIR filter, the number of parameters need to be changed is equal to the number of digital filter coefficients, this make its structure complex and degrade its real-time performance.After the study on sub-band filter bank, according to the uniform DFT filter bank theory, this paper is proposed a design for a structure of variable sub-band filter which is based on DFT transform. At the same time, the design used a poly-phase FIR structure effectively reduces hardware resource consumption. The number of parameters need to be changed for this variable sub-band filter based on DFT transform is far less than the number of filter coefficients. This paper take a four-sub-band variable filter as design example, use system-level modeling tools--System Generator that comes from Xilinx company to set up FPGA hardware structures of the filter, and test and verify this design using a experimental board which consists of a Xilinx FPGA XC3SD1800 A. The results showed that by using four-coding-switch can set arbitrarily combination of the different sub-band filter,thus realize the function that can vary filter-band in real time.On the other hand, high order FIR variable filter uses the time-domain linear convolution filter demands a high computational complexity. To reduce this complexity, this paper design a variable sub-band filter which based on OVERLAP-SAVE algorithm. Therefore, by using FFT fast filtering time-domain linear convolution is transformed to low-complexity frequency-domain multiplication.In this paper, a variable filter based on OVERLAP-SAVE algorithm is designed for the sub-band filtered OFDM communication as an example. The variable filter consist of two 720KHz-wide sub-band each included 48 30 KHz sub-carriers and 2415 KHz sub-carriers; and separated by different number of guarding sub-carriers. This filter is the prototype of this filter is design by on the Cyclone IV E device by using Altera 4096 point IP FFT core. The performance of the OFDM communication model based on this OVERLAP-SAVE variable sub-band filter is tested under Matlabenvironment; and the functionality of this variable sub-band filter is verified under Modelsim.
Keywords/Search Tags:Filter Bank, Sub-band Filter, FPGA, IP Core
PDF Full Text Request
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