High Speed Memory Test System Based TIGERSHARC DSP

With the rapid development of the semiconductor technology, the capability andthe integration degree of the digital signal processor enhanced quickly, the productbased on DSP is applied abroad. This paper gives the theory, developed process andthe superiority of pattern generator for memory test based on high speed float-pointdigital signal processor TS101. The research in the paper is based on digital signal processor, and focus on thesoftware and the hardware of the high speed memory test system. This method breakthrough the restriction of tradition test method, it has compact structure, flexibleprogramme mode, and exceed the max test speed of memory test system in ourcountry, which is 40MHz. Our production will have great value in application. This paper is described in four parts as follow: Firstly, the theory of the memory test is introduced. For the synchronizationdynamic random access memory, we research the structure of the circuit, theworking method and the main reason which can lead errors. And then we discuss thealgorithm which is used to resolve the problem above, and make the necessaryexplanation for it. Secondly, the hardware structure of the system is given. At first we describe thecapability, the theory and the advantage of the flat - digital signal processor TS101,and then analyze the working principle of the memory. Finally, the whole structureof the system is given. Thirdly, we describe the debugging method of the system in detail, analyze andresearch the way by which the compute control the DSP and the way the computecommunicate with it. Fourthly, the working process of the system software is described. By using thetool of VC, we can carry out reading and writing data in a special location of thememory based on ISAcard, and process the above message by the way of interrupt.