Digital Circuits Design Based On RT Quantum Devices

To improve the integration density of ICs, according to the Moore law to develop, craftwork must get great breakthrough. VLSI will not be satisfied with the conditional devices' size, silicon technology will slow down till to break down in the next ten years or much shorter time. The smaller size of the conditional MOS and other electronic devices, the more obvious deleterious side-effect in use. Quantum devices have very outstanding predominance, their high-speed high-frequency high-integrated and low-power characteristic, make them the very important devices in the use of VLSI in the future:This dissertation designed the binary nand gate and nor gate based on RT quantum devices. The designed gates have simple configuration, they also have the advantages that quantum devices possess, so they can suit the requirement of VLSI.Because of the multiple-value characteristic of the RT quantum devices, the multiple-value circuits design get more and more recognition. This paper details a logic operation based on a switching sequence in RT circuits, this scheme enables us to design simpler ternary inverter and quaternary inverter circuits, and use this switching sequence also designed ternary nand gate and ternary nor gate.Flip-flop is the core of sequential circuits, this dissertation designed a synchronous set-reset edge-trigged JK flip-flop based on RT quantum devices, the JK Flip-flop has strong function and high speed, and also riches the types of Flip-flops in quantum circuits.With the high development of the quantum circuits, the testability of the circuits will become a very serious problem. The method of testability design for RT circuits is proposed in the end of this paper, which has high testability and low hardware cost. Only adding one extra MOS transistor and two control ports, it can detect all open and short faults in RT circuits. The result of design for testability is validated by PSPICE.