Study On The Model Of IC's Functional Yield And The Method Of Extracting Parameters

This dissertation aims at discussing the model of functional yield of integrated circuits and the method of extracting the parameters of yield model. The Author's main contributions are as following:First, the principle of circuit faults caused by manufacturing defects is studied. Some existing models of functional yield are discussed in detail. Their advantages and disadvantages are analyzed and compared. A new method named correlation coefficient method is put forward to judge which model is better. This method overcomes the disadvantage of the method available.Second, the microelectronics test structure design to extract parameters of functional yield models based on electrical measurements is researched at length. The chip of the double bridge test structure is put into production. The testing experiment indicates that the test structure can be used to test the status of defects of multiple technologies.Then, based on the double bridge test structure, an optimization method is presented which is used to extracting the parameters of yield model fast and effectively. The extracted parameters can be used to predict the product yield. The concept of the effective defect density is firstly presented which reflects the status of the defects better than the average defect density.Finally, a defect testing system is researched and developed which can test the size and class of defects. This system has the advantages of high precision and easy operation. The testing results are satisfactory.The contributions of this dissertation will promote the practicability of the design and simulation of functional yield.