Mechanisms Of Irradiation Transient Charge Modulation And Novel Hardening Structures Of High Voltage LDMOS Devices

Due to its advantages of fast switching speed,low power consumption and easy integration,high voltage LDMOS devices are widely applied in switching power supply and drive circuits in aerospace field as core devices.Heavy ions are ubiquitous in the extreme environment of the universe,and the single event effect（SEE）caused by heavy ions can cause instantaneous damage or even failure of semiconductor devices.Compared with low voltage CMOS devices,high voltage LDMOS devices have more complex structure,more prominent parasitic effect,and more complex SEE mechanisms and more serious damage,so it becomes the bottleneck of the development in irradiation hardening for high voltage power integrated circuits.Based on the theory of charge and field modulation,this thesis reveals the damage mechanism of SEE in high voltage LDMOS,that is,the instantaneous charge Q_iongenerated by irradiation of incident heavy ions changes the charge field E_Qand current I_Qin the body,and eventually leads to electro-thermal damage and even breakdown failure.By establishing the damage model,the novel SEE hardening structures with current suppression,electric field modulation and charge shielding designs are proposed.It greatly improves the hardening ability of LDMOS devices to single event burnout（SEB）and single event transient（SET）.The main research contents and innovations are as follows:1.Novel SEE hardening trench drain LDMOS structure and separated buffer layer LDMOS structure are proposed respectively.The coupling relationship between electric field,current and lattice temperature under the modulation of transient non-equilibrium charge is revealed,and a SEE electro-thermal burnout damage model is established.The drain metal is introduced into the body to construct a novel trench drain structure through the trench technology.By using the higher thermal conductivity of the metal and the equal potential in the electric field,the regional current is changed from the surface aggregation type to the body dispersion type distribution,the local current density is suppressed,and the peak electric field at the drain is greatly suppressed.Both the electrical breakdown point and the thermal breakdown point are transferred from the surface to the body,thus improving the SEB hardening ability.The results show that the SEB triggering voltage(V_SEB)of the TD-LDMOS device reaches 288V,and the SEB hardening capability is improved by 46%.At the same time,through the N-type injection window design,the buffer layer is innovatively separated from the drain edge,and a novel structure is constructed with a single buffer layer.The separated buffer layer can weaken the peak drain electric field,reduce the avalanche secondary hole current,and raise the thermal breakdown temperature threshold.The results show that compared with conventional devices,the V_SEBof NSBL-LDMOS devices with separated buffer layer reaches 336V,and the SEB hardening capability is improved by 70%.2.A novel SEE hardening deep buffer layer LDMOS structure is proposed.The modulation mechanism of instantaneous charge on electric field and current is revealed,and a electron avalanche SEE damage model is established.Based on the damage mechanism,a novel structure with deep buffer layer is constructed through the N-type injection window in drain of the conventional device to improve the SEB hardening ability of the device.By using this structure,the peak electric field is weakened,the distribution of electric field is reconstructed,and the Kirk effect and non-equilibrium electron injection avalanche breakdown are suppressed.The results show that the V_SEBof NB-LDMOS device with the deep buffer layer reaches 306V,and the SEB hardening capability is improved by 55%compared with the conventional device.At the same time,based on the mechanism of Kirk effect,the deep N-plug LDMOS hardening structure is proposed.Without changing the original drift area,a novel structure of deep N-plug layer is constructed at the drain through N-type injection window to improve the SEB hardening ability.The results show that the V_SEBof NP-LDMOS device with the deep N-plug is 291V,and the SEB hardening capability is improved by 48%.3.A novel SEE hardening partially buried oxide（BOX）LDMOS structure is proposed.The mechanism of source electron hole current and false opening of parasitic NPN transistor is revealed.Based on the deep buffer layer structure,a partial BOX layer is introduced into the drift to construct a novel structure with electric field suppression and source current shunt.The buffer layer is used to suppress the avalanche breakdown of electrons at drain,and the proportion of source hole current is increased to reduce the source electron current,so as to alleviate the false opening of the source parasitic transistor.The results show that,compared with conventional device,the V_SEBof NB-PB LDMOS device is 397V,and the SEB hardening capability is improved by100%.In addition,by extending partial BOX layer to the drain,a novel Ni N-LDMOS structure is proposed,and a SEE transient current damage model is established for high voltage LDMOS devices.The transient response of transient current and drain voltage is revealed by energy deposition and charge collection.The results show that Ni N-LDMOS devices have lower charge collection and shorter transient response time under SET.Compared with conventional device,the pulse width of SET signal of Ni N-LDMOS devices is 4ns,which is reduced by 83%.