Investigation On Key Performance Of 600 V Power MOSFET

Power MOSFET is the core component of power conversion system.With the continuous expansion of the application market of power MOSFET and the increase of the demand for electrical energy,the power conversion system is developing towards high energy efficiency.It is urgent to improve the power density and switching speed of power MOSFET and reduce its loss.Therefore,in this paper 600 V VDMOS is investigated from many aspects such as improving the trade-off between breakdown voltage（BV）and specific on-resistance(R_on,sp),reducing the gate-drain capacitance(C_GD),optimizing the reverse recovery characteristics and so on,which is expected to explore the method and the new structures of improving the performance.The work about VDMOS has been done in this paper as follows:1.Aiming at the problem that the on-resistance is reduced with the sacrifice of breakdown voltage and gate-drain capacitance,a Split-Gate VDMOS with multiple shielded trenches is proposed.The trench field plates（TFPs）and the thick oxide layer in the trench are adopted to modulate the electric field distribution to improve the breakdown voltage.The on-resistance is effectively reduced by utilizing the assisted depletion effect of TFPs and the anti-JFET ion implantation technology.And the gate-drain capacitance is significantly reduced due to the split-gate structure and the shielding effect of TFPs.In this paper,the performance of the proposed structure and the effects of the key structural parameters on BV,R_on,sp and C_GD are simulated,which shows that BV,R_on,sp and C_GD change a little with the changes of the key parameters.Hence,the proposed structure is robust.When Compared with the corresponding conventional VDMOS（C-VDMOS）,R_on,sp of the proposed structure is decreased by 33.4%,and the power merit(BV²/R_on,sp)is increases by 54.8%.The Specific gate-drain Charge(Q_gd,sp)is decreased by 84.0%,and HF-FOM(High Frequency Figure Of Merit,R_on,sp×Q_gd,sp)is decreased by 89.4%.Hence,the power merit and the switching speed of the proposed structure are improved without sacrificing breakdown voltage.2.The reverse recovery characteristics of the parasitic diode is optimized with the accompanied sacrifice of on-resistance or/and breakdown voltage.To overcome this problem,a named TMBS-VDMOS integrating TMBS（Trench MOS Barrier Schottky）structure and split gate is proposed in this paper.When the on-resistance and the gate-drain capacitance are greatly reduced due to the anti-JFET ion implantation technology and the split-gate structure,respectively,TFPs in the TMBS are utilized to ensure the improved breakdown voltage.At the same time,because the maximum electric field at the Schottky contact is reduced by TFPs,the schottky barrier lowering and effect of prebreakdown avalanche multiplication are weakened,and the increase of reverse leakage current is suppressed.In the reverse conduction,most of the forward current flows through the Schottky contact to the drain,thus the reverse recovery characteristics is significantly optimized.The performance of the new structure and key structural parameters on the main performance are simulated.The simulation results display that gate-drain capacitance and the reverse recovery characteristics can be significantly optimized without sacrificing both on-resistance and breakdown voltage.Moreover,the new structure is also robust.Compared with the corresponding C-VDMOS,the simulation results show that R_on,sp of TMBS-VDMOS is reduced by 25.1%,gate drain charge and gate charge are reduced by 78.4%and 49.2%,respectively.The reverse recovery time,and the reverse recovery current peak and the reverse recovery charge are reduced by34.1%,51.3%and 68.0%,respectively.Even the softness SF increased by 43.9%.3.To solve the problem that the reverse leakage current increases after a Schottky contact is integrated into the VDMOS cell,HK-TMBS-VDMOS with high-K dielectric in the trench is proposed on the basis of the study of TMBS-VDMOS,which can significantly reduce the reverse leakage current without degrading other performance.Owing to high-K dielectric,the coupling effect between the trench field plate and epitaxial layer becomes stronger,and shielding effect between VFPs is also strengthened.Consequently,both the maximum electric field of the schottky contact and electric field between trenches are reduced,by which the schottky barrier lowering and effect of prebreakdown avalanche multiplication are further weakened,hence,the reverse leakage current is decreased considerably.The main performance of the proposed structure and the influence of key structural parameters on performance are simulated,which indicates HK-TMBS-VDMOS is more robust than TMBS-VDMOS.When Hf O₂ is adopted,compared with TMBS-VDMOS,the simulation results show that breakdown voltage of HK-TMBS-VDMOS is slightly increased,the on-resistance and gate charge are basically unchanged,the reverse recovery charge is slightly reduced,and the reverse leakage current is reduced by 18.1%.4.In view of the large error between the theoretical and the simulated values of VDMOS threshold voltage,a method is proposed to obtain the simulated value of threshold voltage from the transfer characteristic curve by the fixed current calculated by substituting(V_GS-V_th)=0.1 V into the current formula,when no short channel effect and the uniform distribution of impurities in P-body region are assumed.The frequently-used model to calculate threshold voltage is independent of the channel length,while threshold voltages in the measurement and the simulation are achieved from the transfer characteristic curve by the fixed current value,which is closely related to the channel length,resulting in the difference between the simulated and theoretical threshold voltages.The simulation results show that the simulation value of threshold voltage obtained by this method is closer to the theoretical value,and the error between them is smaller.5.In order to avoid the premature breakdown of the Gate-Pad area of 600 V VDMOS chip,two design schemes of Gate-Pad area are presented.The first one is that the Gate-Pad area is designed as a part of the cell area,and it should be ensured that the spacing between the P-type regions underneath the Gate-Pad area is not greater than that in the cell.The second one is that the Gate-Pad area is designed as a part of the terminal,and the P-region under the Gate-Pad area can be connected to the main junction of the terminal.According to the second design scheme,a P-type region can be formed under the Gate-Pad area by only changing the field-ring mask in this area,which is connected to the main junction of the terminal.The test results show that the breakdown voltage of the redesigned VDMOS is 652V,which means the premature breakdown of the Gate-Pad area is effectively eliminated.