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Research On Key Techniques Of CMOS Terahertz Wireless Transceivers

Posted on:2020-09-07Degree:DoctorType:Dissertation
Country:ChinaCandidate:Y B LiuFull Text:PDF
GTID:1488306131966749Subject:Microelectronics and Solid State Electronics
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Terahertz(THz)technology has drawn increasing attention in recent years due to their potential in wireless communations,radar imaging systems,safety monitoring systems,medical diagnosis,and spectroscopic analysis.Communitaion systems in terahertz frequency band have much potential to realize satellite communications,data transmission with ultra-high data rate between a short range,and the wireless network on one chip,among chips or among computer clusters,due to its wider available frequency band,shorter wavelengths of the signals,and unique channel characteristics.In this dissertation,the key techniques of CMOS terahertz wireless transceivers are studied.The design and the tapeout with TSMC 40 nm CMOS processing is realized to demonstrate the techniques proposed in this dissertation.The main contributions of this dissertation are summarized as follows.1.To realize a THz wideband amplifier,the layout optimization technique of the transistors,neutralization techniques,and the wideband matching technique based on coupled transmission lines are proposed.These techniques boost the power gain,improve the stability,and extend the wideband of the amplifiers.A four-stage differential wideband amplifier operating in THz frequency band is presented.Measured results show that the amplifier achieves a peak gain of 10.1 d B and a 3-d B bandwidth of 35 GHz ranging from 185 GHz to 220 GHz.2.This dissertation presents a wideband bidirectional transceiver front-end with a transmit/receive(T/R)switch.The front-end in the transmitter(TX)mode achieves a measured 3-d B bandwidth of 32.8 GHz with a peak gain of 9.6 d B and a simulated saturated output power of 3.0 d Bm,while the receiver(RX)mode features a measured 3-d B bandwidth of 34.8 GHz with a maximum gain of 10.5 d B and a simulated minimum noise figure(NF)of 10.8 d B.The implementation of the bidirectional transceiver front-end demonstrates the feasibility to integrate the tranmitter and receiver with a single on-chip antenna in THz frequency band,which considerably reduces the cost of the total system.3.This dissertation proposes many frequency multiplication techniques to realize a higher frequency signal output in the design of the oscillators.A voltage-controlled oscillator(VCO)with transformer-based push–push frequency doubler is presented.The proposed VCO achieves a measured continuous tuning range from 181.9 to 195.5 GHz.The measured output power at 195.5 GHz is-7.26 d Bm and the phase noise at 10 MHz offset is-97.18 d Bc/Hz.4.A high-order distributed passive network is analysed in this dissertation.The injection locking technique is also introduced in this dissertation.The high-order distributed passive network is utilized to boost the operating frequency of the oscillator and expand the locking range of the injection lock frequency divider.A U-band phase-locked loop(PLL)is realized based on the techniques mentioned above.The PLL achieves a measured locking range of 8.15 GHz(16%)from 46.75 GHz to 54.9 GHz.The measured phase noise is-91.76 d Bc/Hz at 1 MHz offset frequency from 46.75 GHz carrier.Integrating with a frequency doubler,the proposed U-band PLL can provide a clear and stable local oscillation signal for the transceivers with coherent modulation schemes operating at millimeter-wave(mm-wave)and sub-terahertz(sub-THz)frequency band.5.This dissertation proposes many modulation techniques in the design of the on-off keying(OOK)transceiver.A novel modulation technique with the cascode frequency doubler topology is presented to achieve a higher on-off isolation and a faster response speed for a higher data rate.A G-band OOK bidirectional transceiver is realized in 40 nm CMOS.The transceiver integrats the transmitter and the receiver in a single chip with a common input/output port.The transceiver can achieve a maximum output power of 1.28 d Bm,and a 25 d B on-off power ratio.The transceiver can realize 10 Gb/s bit rate data communications.
Keywords/Search Tags:CMOS, Terahertz, wireless transceiver, wideband amplifier, bidirectional transceiver front-end, Oscillator, phase-locked loop(PLL)
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