Design of Low-power, Low-noise Readout Circuits for Sensory Microsystems

A wide range of new applications, especially in the areas of health and environmental monitoring, have become possible due to advances in the sensor technologies over the last decade. To translate those advances in the sensor technologies into sensory microsystems amenable to these applications, novel techniques and design methodologies have to be developed at the sensory interface to address more stringent system constraints and the imperfections in these sensor technologies. We propose and demonstrate the design methodologies and implementations of the sensory microsystems for two novel sensor technologies, selective metaloxide gas sensor and semiconductor scintillator.;The gas sensing system with a selective metal-oxide gas sensor is developed to discriminate and measure the signaling metabolites in human exhaled breath. The gas sensor indicates the gas density by changing its resistance with the concentration of the target gas. The proposed readout integrated circuits are able to interface the sensors with the baseline resistance from 1k Ohm to 100M Ohm and measures the gas induced resistance change in the range from 0.05% to 10% of the baseline resistance. The high resolution and low power are realized in the proposed readout architecture with an adaptive baseline compensation structure and 13-bit Sigma-Delta ADC. A 0.5 mum CMOS technology prototype integrated chip is taped out and tested to demonstrate the wide dynamic range and low power consumption of the readout circuit.;The radiation detection system is implemented with a large-area epitaxial photodiode integrated on a body of a semiconductor scintillator. The radiation detector is stimulated by the radiation particles and generates electronic charge into the readout circuits. The design of low-noise readout circuit including charge sensitive amplifier, pulse shaper, peak detector and clock-less A/D converter are discussed. The size of the input transistor and the peaking time of the shaper are optimized to obtain a minimum equivalent noise charge (ENC) with a large input load capacitance. A time-based clock-less A/D converter is implemented to minimize the interference from the digital part of the readout system on the low-noise charge-sensitive amplifier. A prototype integrated chip is built in a standard 0.5 mum CMOS technology and the corresponding test printed circuit board (PCB) with chip on board technique is fabricated. An ENC of 334 electrons is measured at 50 pF input capacitance with a slope of 4.5 electrons/pF and the linearity is better than +/-1%. The total power consumption of one charge amplification channel is 2.2mW.