Design Of An Infrared Readout Circuit With CDS

Nowadays infrared imaging technology has been widely used in scientific exploration, military applications, medical treatment etc, and the requirement of its performance is also increasing. As a crucial part of the whole infrared imaging system, the noise-performance of infrared readout circuit determines the quality of image to a great extent. Designing low-noise readout circuit is a topic of significance and value.This thesis designed a line array infrared readout circuit with CDS. Firstly, based on the analysis of MOS noise, KTC noise and FPN noise in readout circuits, the inhibitory effect of CDS on the various types of noise is analyzed in detail. In the design of pixel, CTIA structure is adopted to obtain stable detector bias, low noise and better linearity. According to the characteristics of the noise in pixel unit, a specialized CDS circuit is designed for the column stage. With the optimization of its structure and timing, the noise of the sampled voltage in column readout stage is reduced effectively. To reduce power consumption of the circuits, dynamic tail current is used in the of column readout stage buffer. In addition, buffers of column stage and output stage both adopt 5-transisitor structure to reduce their effects on readout noise.The circuit design and layout design is completed on the CSMC 0.5?m CMOS process platform. The results of the post layout simulation show that:the circuit can work normally under the clock frequency of 5MHz. The output swing is 3.0V, linearity of this circuit is 99.5%, the power consumption of single column is 0.257mW, the noise voltage is 0.259mV and the dynamic range is 81.2dB. The simulation results basically meet the design requirements.