| Soft error mitigation has become a growing design concern for ground-based modern commercial circuits due to the scaling of CMOS devices. As the transistor size shrinks and the supply voltage decreases, devices have become more vulnerable to environmental disturbances and more prone to generate soft errors. Conventional soft error analysis focuses on the soft error probability or rate for a given circuit while tacitly assuming that all errors are functionally equal and can be eventually eliminated as long as sufficient mitigation has been applied. In low dose rate environment, this assumption is usually tenable, so conventional soft error analysis and mitigation schemes work well as has been reported by existing works. However, when the dose rate grows high, the foregoing assumption no longer holds, because the effects caused by long-duration errors are quite different than those caused by short-duration ones. Therefore, the properties of soft errors in terms of both probability and persistency must be studied and mitigation strategy must be made accordingly. The problem that this dissertation solves is soft error analysis and mitigation for high dose rate environments.;This dissertation presents a soft error analysis scheme which uses probabilistic models in the form of Markov chain to estimate both error probability and persistency. This dissertation also presents a soft error mitigation scheme which aims at both enhancing mitigation effectiveness and controlling mitigation costs. As will be demonstrated, over- or under- protection caused by conventional mitigation schemes can be successfully prevented by applying hierarchical mitigation. |
